Currently in damascene processes for forming copper interconnects, physical vapor deposition (PVD) is employed to first form a diffusion barrier layer and then a conductive seed layer. The barrier layer is often made from a refractory metal or metal nitride, and is sometimes provided as a bilayer (e.g., Ta/TaN), while the seed layer is made from copper or a copper alloy. After these PVD layers are formed on an etched dielectric layer, copper is electrodeposited on the seed layer, preferably uniformly across the wafer surface and without forming voids in the features (e.g., trenches and vias provided on the dielectric layer). As features become smaller with advancing technology nodes, the thickness of PVD seed in these high aspect ratio features is reduced in order to prevent pinch-off problems. The thinner copper seed layer often results in marginal coverage within the features, especially along the sidewalls, thereby posing a challenge to obtain void-free fill during subsequent electroplating.